1. Field of the Invention
The present invention relates to a method of manufacturing a solid-state image sensor.
2. Description of the Related Art
Japanese Patent Laid-Open No. 2008-060380 discloses a method of manufacturing a solid-state image sensor having pixels each of which includes a MOS transistor including a channel region and a gate electrode, and a photodiode region in contact with the channel region under the gate electrode. Japanese Patent Laid-Open No. 2006-222427 discloses a sensor array including a plurality of pixels arranged in plane symmetry.
When the method of Japanese Patent Laid-Open No. 2008-060380 is applied to manufacture the sensor array described in Japanese Patent Laid-Open No. 2006-222427, ions are implanted from different directions to form the impurity regions of adjacent pixels. In this case, different resist patterns are normally formed in the respective ion implantation steps. However, if resist patterns are formed as many as the number of ion implantations required to form a photodiode region, the number of steps increases. In addition, the pixel characteristics vary due to alignment errors between the resist patterns.